ECTM Electronic Components, Technology and Materials
Introducing
2
Prof. dr. C.I.M. Beenakker
Kees Beenakker was born in Leiden in 1948. In 1971 he got his M. Sc.in chemistry and physics at Leiden University and joined as an Ph. D. student the FOM-Institute for Atomic and Molecular Physics in Amsterdam. After graduation in 1974 he joined Philips Research Laboratories in Eindhoven. There he was involved in various research projects related to IC technology. In 1982 he moved to the Philips Semiconductor Division in Nijmegen to become head of the corporate assembly process and equipment development. In that position first intensive contacts were established with the microelectronics industry in the Far East. In 1987 he resigned at Philips and became cofounder of Eurasem, a European hi-rel IC assembly company. In 1989 Kees Beenakker joined Dimes and is since 1990 full professor at the faculty of EEMCS (Electrical Engineering, Mathematics and Computer Science). From 1990 till 2004 he was chairman of the ECTM laboratory. From 1999 till 2009 he was chairman of the department of Microelectronics and Computer Engineering and from March 2007 till May 2012 he was scientific director of DIMES, the Delft institute of microsystems and nanoelectronics. Since May 2012 he is director of the TU Delft-Beijing Research Centre in Beijing and is alternately located in Delft and in Beijing. Kees Beenakker is a member of the national Medea advisory committee, member of the scientific board of the Debije Institute, the ENIAC scientific council and board member of the Advanced Packaging Centre at Boschman Technologies. He is a founder of the Else Kooi Foundation, the SAFE conference, the Tsing Hua-TU Delft training centre of microelectronics technology in Beijing and the Fudan-TU Delft International school of microelectronics in Shanghai. Since March 2006 he holds a honorary guest professorship at the Tsinghua University in Beijing and since 2012 also from the Institute of Semiconductors of the Chinese Academy of Sciences in Beijing. Since June 2008 he is elected chaiman of the academic council of Point-One, the national initiative on nanoelectronics and embedded systems. His specific research interests include technology for thin films and integrated circuits.
Contact
Phone:
:
+31-(0)15-27 84050/86234
Office:
:
DI 00.020
Publications on metis:
Publications:
High-sensitivity single-grain Si PIN photodiode with thick-silicon and deep doped regions
Monolithic 3D-ICs with single grain Si thin film transistors
DOI
Electrical characterisation of low temperature aligned carbon nanotubes for vertical interconnects
Single-grain Si TFTs using spin-coated liquid-silicon
DOI
Integrating low temperature aligned carbon nanotubes as vertical interconnects in Si technology
Plasma decapsulation of plastic IC packages with copper wire bonds for failure analysis
DOI
Plasma etching for failure analysis of integrated circuit packages
DOI
Monolithic 3D-ICs with single grain Si thin film transistors
DOI
Monolithic 3-D integration of SRAM and image sensor using two layers of single-grain silicon
document
Patterned aligned carbon nanotubes for vertical interconnects in 3D integrated TFT circuits
Single grain TFTs and lateral photodiodes for large area X-ray detection
Design and fabrication of single grain (SG) TFTs and lateral PIN photodiodes for low dose X-ray detection
DOI
Hot carrier effect and tunneling effect of location- and orientation-controlled (100)- and (110)-oriented single-grain Si TFTs without seed substrate
DOI
Excimer laser crystallization of InGaZnO4 on SiO2 substrate
DOI
Single-grain Si TFTs for high-speed flexible electronics
DOI
Orientation-and-location controlled single-grain TFTs on glass substrate
document
Single-grain Si TFTs with high performance surpassing SOI-TFTs
document
High Performance Single Grain Si- TFT X-ray Image Sensors
Patterned growth of carbon nanotubes for vertical interconnect in 3D integrated circuits
Growth of high density aligned carbon nanotubes using palladium as catalyst
document
High speed 6T SRAM cells using single grain TFTs fabricated by "angstrom""micro"-Czochralski-Czochralski process at low temperature
Single grain TFTs for high speed flexible electronics
document
Stacking of Single-Grain Thin-Film Transistors.
Investigating Low Temperature High Density Aligned Carbon Nanotube and Nanofilament Growth using Palladium as Catalyst.
Simulation and Experimental study of crystallographic orientation control of 2D location controlled single grain crystalline silicon
A three-dimensional phase-field simulation of pulsed laser induced epitaxial growth of silicon
Characterization of local electrical property of coincidence site lattice boundary in location-controlled silicon islands by scanning probe microscopy
Direct observation of the electrical activity of coincidence-site lattice boundaries in location-controlled silicon islands using scanning spread resistance microscopy
Analog and digital output lateral photodiodes fabricated by "angstrom""micro"-Czochralski process at low temperature
Integrated High Performance (100) and (110) Oriented Single-Grain Si TFTs without Seed Substrate
Expitaxially grown (111) oriented Si film on a crystalline InGaO3(ZnO)5 substrate
High Performance n- and p-channel Strained Single Grain Silicon TFTs using Excimer Laser
Monolithic Stacking of Single-Grain Thin-Film Transistors to realize high performance three dimensional integrated circuits
A study on CMP effect on the quality of thin silicon film crystallized by "angstrom""micro"-Czochralski process
Single Grain Si TFTs for RF and 3DICs
High speed 6T SRAM cells using single grain TFTs fabricated by "angstrom""micro"-Czochralski process at low temperature
Comparing Single Grain and Poly silicon Lateral PIN Photodiodes
Growth of high density aligned carbon nanotubes using palladium as catalyst
Fabrication of 6T SRAM cell using single grain TFTs obtained by "angstrom""micro"-Czochralski process
Monolithic 3D-ICs with Single Grain Si TFTs
Monolithic Three-Dimensional Stacking of Integrated Circuits with a Low-Temperature Process
Optimizing Chemical Mechanical Polishing process in 3D-IC
Fabrication of Three-Dimensional Inverters Using the "angstrom""micro"-Czochralski
Monolithic Stacking of Single-Grain Thin-Film Transistors
Monolithic 3D Integration of Single-Grain Si TFTs
CMP effect on the quality of thin silicon film crystallized by "angstrom""micro"-Czochralski process with excimer laser irradiation
Location and Crystallographic Orientation Control of Si Grains Through Combined Metal Induced Lateral Crystallization and micro-Czochralski process
Investigation of Local Electrical Properties of Coincidence-Site-Lattice Boundaries in Location-controlled Silicon Islands using Scanning Capacitance Microscopy
Single-Grain Si TFTs and Circuits Fabricated Through Advanced Excimer-Laser Crystallization
<110> Orientation and Location Controlled Si Grains Through Combined MILC and "angstrom""micro"-Czochralski Process
Local electrical properties of coincidence site lattice boundaries in location-controlled silicon islands by scanning capacitance microscopy
Location and Orientation Control of Si Grains Through Combined MILC and μ-Czochralski process
Single-Grain Si Thin-Film Transistors for Analog and RF Circuit Applications
Local electrical property of coincidence site lattice boundary in location-controlled silicon islands by scanning spread resistance microscopy
Characterization of local electrical property of coincidence site lattice boundary in location-controlled silicon islands by scanning probe microscope
SPICE Modeling with NQS effect of Single-Grain Si TFTs using BSIMSOI
Defect States in Excimer-Laser Crystallized Single-Grain TFTs Studied with Isothermal Charge Deep-level Transient Spectroscopy
Preparation of large, location-controlled Si grains by excimer-laser crystallization of a-Si films sputtered at 100oC
Single-grain Si TFTs fabricated at 100oC for microelectronics on a plastic substrate
Agglomeration of amorphous silicon film with high energy density excimer laser irradiation
Microstructure characterization of location-controlled Si-islands crystallized by excimer laser in the micro-Czochralski (grain filter) process
Large Polycrystalline Silicon Grains Prepared by Excimer Laser Crystallization of Sputtered Amorphous Silicon Film with Process Temperature at 100oC
Crystallographic orientation- and location-controlled Si single grains on an amorphous substrate for large area electronics
document
DC modeling of Single-Grain Si TFTs using BSIMSOI
SPICE Modeling of Single-Grain Si TFTs using BSIMSOI
Single grain Si TFT's and circuits based on the µ-Czochralski process
document
Preferred <100> surface and in-plane orientations in self-assembled poly-Si by multiple excimer-laser irradiation
Single-Grain Si TFTs and Circuits for Flexible Electronics and 3D-ICs
Preferred <100> Surface and In-Plane Orientations in Self-Assembled Poly-Si by Multiple Excimer Laser Irradiation
Defect States in Excimer-Laser Crystallized Single-Grain TFTs Studied with Isothermal Charge Deep-level Transient Spectroscopy
Preparation of large, location-controlled Si grains by excimer laser crystallization of α-Si film sputtered at 100 °C
Preparation of Large Poly-Si Grains by Excimer Laser Crystallization of Sputtered a-Si film with Processing Temperature of 100 °C
A Novel Selected Area Laser Assisted (SALA) System for Crystallization and Doping Processes in Low-Temperature Poly-Si Thin-Film Transistors
Effects of Capping Layer on Grain Growth with μ-Czochralski Process during Excimer Laser Crystallization
Capping Layer on Thin Si Film for μ-Czochralski Process with Excimer Laser Crystallization
Electrical characterisation of matched pairs for evaluation of integrated circuit technologies
document
A Novel Selected Area Laser Assisted (SALA) System for Crystallization and Doping Processes in Low-Temperature Poly-Si Thin-Film Transistors
High Performance Single Grain Si TFTs Inside a Location-Controlled Grain by μ-Czochralski Process with Capping Layer
Capping Layer on Thin Si Film for micro-Czochralski Process with Excimer Laser Crystallization
Dependence of Single-Crystalline Si Thin-Film Transistor Characteristics on the Channel Position inside a Location-Controlled Grain
Electrical property of coincidence site lattice grain boundary in location-controlled Si island by excimer-laser crystallization
Formation of crystalline-silicon islands for thin-film transistors by excimer-laser-induced lateral growth
document
Location-controlled large Si islands by excimer-laser annealing on glass substrate
document
Single-crystalline Si TFTs fabricated by the µ-Czochralski (grain-filter) process
Property of single-crystalline Si TFTs fabricated with "angstrom""micro"-Czochralski (grain filter) process
Phase-Field Modelling of Excimer Laser Lateral Crustallization of Silicon Thin Films
document
High-performance TFTs fabricated inside a location-controlled grain by µ-Czochralski (grain-filter) process
High Performance P-Channel Single-Crystalline Si TFTs Fabricated Inside a Location-Controlled Grain by µ-Czochralski Process
High performance P-channel single-crystalline Si TFT fabricated inside a location-controlled grain by µ-Czochralski process
Advanced excimer-laser crystallization process for single-crystalline thin film transistors
document
Electrical characterization of c-Si TFTs fabricated by location-controlled laser crystallization
document
Location-control of large grains by micro-Czochralski (grain filter) process and its application to single-crystalline silicon thin-film transistors
Single-Crystalline Si Thin-Film Transistors Fabricated with µ-Czochralski (Grain-Filter) Process
Single-crystalline Si thin film transistors with electron cyclotron resonance plasma enhanced chemical vapor deposited gate SiO2
Single-Crystalline Si TFTs Fabricated with Micro-Czochralski (grain-filter) process
Integration of Expanding Thermal Plasma deposited hydrogenated amorphous silicon in solar cells.
Energy Density Window for Location-Controlled Si Grains by Dual-Beam Excimer-Laser.
document
Electrical characterization of c-Si TFTs fabricated by location-controlled laser crystallization
DIMES: a success story of microelectronics research, education and industry cooperation
Low-temperature wafer-to-wafer bonding for microchemical systems
document
Formation of location-controlled crystalline islands using substrate-embedded-seeds in excimer-laser crystallization of silicon films
Advanced Excimer-Laser Crystallization Techniques of Si Thin-Film for Location Control of Large Grain on Glass
Copper Electroplating for Integrated RF Devices
document
An Anisotropic U-shape SF6 Based Plasma Silicon Trench Etching Investigation
Stability of oriented silicalite- 1 films in view of zeolite membrane preparation